【PCIE系列】110 PCIE Lane Reversal
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Lane Reversal is a Link negotiation behavior that creates a condition where if a Link
fails to train, the Link is then forced to train again with its Lanes re-ordered in the
opposite order. For an 8x situation with a Link wired as Lanes 0 through 7, Lane
Reversal tries the training again with the Link physically wired as Lanes 7 through 0.
If the device connected to the Root Port does not support Lane Reversal, Link training
may fail (no possible Lane-0 match).

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